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PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
M3D315
Rev. 01 -- 07 September 2001
Product data
1. Description
Dual N-channel enhancement mode field-effect transistors within a plastic package using TrenchMOSTM1 technology. Product availability: PHKD6N02LT in SOT96-1 (SO8).
2. Features
s Low on-state resistance s Surface mount package.
3. Applications
s Notebook computers s Portable appliances s Battery chargers.
4. Pinning information
Table 1: Pin 1 2 3 4 5, 6 7,8 Pinning - SOT96-1, simplified outline and symbol Description source1 (s1) gate1 (g1) source2 (s2) gate2 (g2) drain2 (d2) drain1 (d1)
1 Top view 4
MBK187
Simplified outline
8 5
Symbol
d1 d1 d2 d2
s1
g
1
s2
g
2
MBK725
1.
TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
5. Quick reference data
Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tj = 25 to 150 C Tsp = 25 C Tsp = 25 C VGS = 5 V; ID = 3 A VGS = 2.5 V; ID = 3 A Typ - - - - 16 36 Max 20 6 2 150 20 45 Unit V A W C m m drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter
6. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature operating junction temperature source (diode forward) current (DC) Tsp = 25 C peak (diode forward) source current Tsp = 25 C; tp 10 s Tsp = 25 C; Figure 2 and 3 Tsp = 25 C; tp 1 ms; Figure 2 and 3 Tsp = 25 C; Figure 1 Conditions Tj = 25 to 150 C Tj = 25 to 150 C; RGS = 20 k Min - - - - - - -55 -55 - - Max 20 20 12 6 24 2 +150 +150 6 24 Unit V V V A A W C C A A
Source-drain (reverse) diode
9397 750 08522
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
2 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
03aa17
03aa25
120 Pder (%) 80
120 Ider (%) 80
40
40
0 0 50 100 150 Tsp ( C)
o
0
200
0
50
100
150
Tsp ( C)
o
200
P tot P der = ---------------------- x 100% P
tot ( 25 C )
VGS 4.5 V
ID I der = ------------------- x 100% I
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of solder point temperature.
Fig 2. Normalized continuous drain current as a function of solder point temperature.
003aaa140
102 ID (A) 10
RDSon = VDS / ID tp = 10 s 1 ms
1
P
DC
10 ms 0.1 s
=
tp T
10-1
tp T t
10-2 10-1 1 10 VDS (V) 102
Tsp = 25 C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 08522
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
3 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
7. Thermal characteristics
Table 4: Rth(j-sp) Thermal characteristics Conditions Value Unit 30 K/W thermal resistance from junction to solder point mounted on a printed circuit board; minimum footprint; Figure 4 Symbol Parameter
7.1 Transient thermal impedance
102
Zth(j-sp)
003aaa141
(K/W) 10
= 0.02 0.05 0.1 0.2
P
1
=
tp T
0.5 Single pulse
tp T
t
10-1 10-4 10-3 10-2 10-1 1 tp (s) 10
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
9397 750 08522
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
4 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
8. Characteristics
Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol Parameter Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) IDSS gate-source threshold voltage drain-source leakage current ID = 250 A; VGS = 0 V ID = 200 A; VDS = 10V; Figure 9 VDS = 20 V; VGS = 0 V Tj = 25 C Tj = 150 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 12 V; VDS = 0 V VGS = 5 V; ID = 3 A; Figure 7 and 8 Tj = 25 C Tj = 150 C VGS = 2.5 V; ID = 3 A Dynamic characteristics gfs Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VSD forward transconductance total gate charge gate-source charge gate-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time source-drain (diode forward) voltage IS = 6 A; VGS = 0 V; Figure 12 VDD = 10 V; RD = 3.3 ; VGS = 5 V; RG = 4.7 VGS = 0 V; VDD = 10 V; f = 1 MHz; Figure 11 VDS = 10 V; ID = 3 A; ID = 6 A; VDD = 16 V; VGS = 5 V; Figure 13 8.5 - - - - - - - - - - - 11 20 4 10 910 600 400 11 42 140 96 - - - - - - - - - - - - 1.2 S nC nC nC pF pF pF ns ns ns ns V - - - 16 - 36 20 30 45 m m m - - - 0.05 - 10 500 1 A A A 20 0.5 - - 1.5 V V Conditions Min Typ Max Unit
Source-drain (reverse) diode
9397 750 08522
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
5 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
30 ID (A)
003aaa142
10.0 5.0 3.0 ID (A)
40 Tj = 25 oC 30
003aaa143
20
Tj = 150 oC 20
10 2.5 VGS (V) = 0 0 1 2 3 4 5 VDS (V) 6 2.0 0 0 1 2 3 4 5 VGS (V) 10
Tj = 25 C; tp = 300 s
VDS = 10 V
Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values.
Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values.
400 RDSon (m) 300
003aaa144
03aa27
2 a 1.6
2.0
2.5
1.2
200
0.8
100
0.4
VGS (V) = 3.0 0 0 2 4 6 8 ID (A) 10 5.0 10
0 -60 0 60 120 Tj ( C)
o
180
Tj = 25 C
R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature.
Fig 7. Drain-source on-state resistance as a function of drain current; typical values.
9397 750 08522
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
6 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
03aa33
2.5 VGS(th) (V) 2 max
10-1 ID (A) 10-2
03aa36
typ 1.5
10-3 min typ max
1
min
10-4
0.5
10-5
0 -60 0 60 120 Tj ( C)
o
10-6
180
0
0.5
1
1.5
2
2.5 3 VGS (V)
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of junction temperature.
Fig 10. Sub-threshold drain current as a function of gate-source voltage.
104 C (pF) Coss
003aaa145
103
Ciss
Crss
102
0
1
VDS (V)
10
VGS = 0 V; f = 1 MHz.
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 08522
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
7 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
5
IS (A)
003aaa146
5 VGS
003aaa147
4
(V)
4
3
3 Tj = 150 oC 2 Tj = 25 oC
2
1
1
0 0.2 0.4 0.6 0.8
VSD (V)
0
1
0
5
10
15 QG (nC)
20
Tj = 25 C and 150 C; VGS = 0 V
Tj = 25 C; ID = 6 A
Fig 12. Reverse diode current as a function of reverse diode voltage; typical values.
Fig 13. Gate-source voltage as a function of turn-on gate charge; typical values.
9397 750 08522
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
8 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
9. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 pin 1 index Lp 1 e bp 4 wM L detail X A1 (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
Fig 14. SOT96-1 (SO8).
9397 750 08522 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
9 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
10. Revision history
Table 6: Rev Date 01 20010907 Revision history CPCN Description Product data; initial version
9397 750 08522
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
10 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
11. Data sheet status
Data sheet status[1] Objective data Preliminary data Product status[2] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] [2]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
12. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
13. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 08522
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2001. All rights reserved.
Product data
Rev. 01 -- 07 September 2001
11 of 12
Philips Semiconductors
PHKD6N02LT
Dual N-channel enhancement mode field effect transistor
Contents
1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
(c) Koninklijke Philips Electronics N.V. 2001. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 07 September 2001 Document order number: 9397 750 08522

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